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Home > ANSYS Simplorer教學  > Getting Start Guide

 

This article is intended to help new user to have a first and nice experience for Simplorer R18.2.

  1. Getting Start Guide

  2. 問題與討論

    2.1 某些電路符號會有一個紅點(red dot)或"+"表示方向(如RLC、voltage source),其代表的意義是?
         為何有些電路符號沒有紅點(如Diode, BJT)?

    2.2 Voltage Source的設定裡,有一項EMF value是什麼?

    2.3 Voltage Source的設定裡,有一項Spice compatible是什麼?

    2.4 Voltage Source的[Output/Display] tab設定裡,有一項SDB是什麼?

    2.5 Transient Analysis Setup內的Hmin、Hmax該如何設定較好?

    2.6 ICA與EQU有何差別?

    2.7 p.76為何N_REF的"Block Output Signal"要un-check?

    2.8 為何Ch6的"Integration method"要改設成"Adaptive Trapezoid-Euler"?

    2.9 Diode的Component Dialog中,選"Equivalent Line"或"Exponential Function"有何差別?

    2.10 Simplorer SML (Simplorer Modeling Language) models與VHDL-AMS (VHDL Analog and Mixed Signal Extension Standard, IEEE 1076.1) models有何差別?

  1. Getting Start Guide (click to download)

1.1 3-phase Rectifier (三相整流器)

查詢help內關於"TR (Transient) Options"的說明可知:

Integration formula:

Euler -- Damping effects may cause false results for energy relationships.

Adaptive Trapezoid-Euler -- (Default) Used for oscillating LC systems or analog oscillators, especially useful for investigating energy problems.

Trapezoid -- Pure trapezoidal integration formula (no switching to Euler like the
Adaptive Trapezoid-Euler formula). For purely oscillatory circuits with no
discontinuities, this method gives accurate results and may be desirable.
The method is less stable particularly in cases with discontinuities or nonzero
derivatives at time=0.

Analog/Digital synchronization

Mixed-signal synchronization ensures timely exchange of values between the Analog and Digital sub-simulators when simulating systems with both Digital (VHDL) and Analog (VHDL-AMS and SML) models or constructs. This simulation option controls the synchronization strategy used. Although each of the strategies below will yield correct results, correctly selecting the best synchronization strategy for the system to be simulated, will yield the fastest simu­lation.

Hybrid -- (Default) Employs an Optimistic Digital and a Conservative Analog synchronization strategy. Results in faster and more efficient simulations than Conservative synchronization by reducing the number of (unnecessary) Analog solution points. Yields the fastest simulations when the Digital sub-system is smaller than the Analog sub-system, Digital simulation events occur at a higher frequency than Analog steps, and not every Digital event affects the Analog sub-system.

Adaptive -- Adaptively controls the amount of optimism in the Optimistic Digital simulation intelligently depending on the system.
Yields the fastest simulations for systems with small fast digital systems (When the Digital sub-system is larger than the Analog sub-system, Digital simulation events occur at a higher frequency than Analog steps, and not every Digital event affects the Analog system.)

Conservative -- Synchronizes at the minimum time step requested by each sub-simulator. Requires that the Analog system simulation be solved for every Digital system event - irrespective of whether the analog system is affected or not. Yields the fastest simulations for systems with tight feedback loops requiring frequent synchronization (i.e., when every Digital event affects the Analog sub-system).

Samanskii factor:

The Update Jacobian after __ iterations setting is an optimization method where the simulator only re-evaluates the Jacobian Matrix after the specified number of iterations. Default is one (1) which indicates that optimization is turned off. A value between 1 and 10 is allowed. In case of systems requiring a very large number of iterations per time step for convergence, a value greater than 1 can improve the performance of the simulator by avoiding Jacobian evaluations and matrix factorizations.

Note : A very high value may lead to non-convergence. Ideally use a value between 2 and 6.

Advanced step mode:

Switches between the advanced and standard step size algorithms. By default, the improved algorithm is used. Deselect the check box to use the standard algorithm. With Advanced step mode selected, the step size is more dynamic, increasing and decreasing at a faster rate compared to the standard algorithm. Using Advanced step mode leads to faster simulation speed especially when a small Hmin is necessary for good accuracy, but only at limited points throughout the simulation. For best results with this algorithm, there should be sufficient separation between Hmin and Hmax.

If the system needs a small time step at a lot of points, the standard algorithm could be the bet­ter choice. This is because the Advanced step mode causes the simulator to first overrun the required simulation points, and then rollback to hit it. This increases the total number of itera­tions and slows down the simulation speed.

Number of equal steps:If Advanced step mode algorithm is selected, this parameter sets the number of consecutive time steps of equal size that must be taken before a larger step size is used. Default value is zero. An integer value greater than zero should be used.
Step acceleration damping [%]:If Advanced step mode algorithm selected, this parameter sets the rate of damping of the step size acceleration for the next time step. Default value is zero. A value between 0-100% should be selected. A lower value for this parameter allows higher simulation speed; a higher value may be used to increase simulation stability.

Simulator pivoting strategy:

By selecting the Manual checkbox and thus enabling the performance slider control, it is possible to influence the pivoting algorithm used by the circuit simulator. The position of the performance slider and the sparseness of the system matrix determine the choice between partial (diagonal) or complete pivoting in the solver.

1.2 3-phase Rectifier + current controlled DC Motor (三相整流器的DC output後接一個電流控制的DC馬達)

本段的重點在如何設定一個電流控制的直流馬達負載,而控制的方法又有兩種,一是使用TPH (Two-point Element with Hysteresis),一是使用state graph component. 透過此例的練習,讀者將可略窺Simplorer在控制系統上的強大功能與彈性。

1.3 3-phase Rectifier + current and speed controlled DC Motor

本段的重點在如何設定一個電流控制的直流馬達負載,而控制的方法改以PI (proportional-integral) controller

1.4 VHDL-AMS Model

本段的重點在如何以VHDL-AMS models設定一個電流控制的直流馬達負載

1.5 PWM Modeling

本段的重點在示範四種設定PWM (Pulse Width Modulation波寬調變)的控制方法

做完這份getting start guide不難發現,Simplorer的使用流程跟Designer其實很像:匯入\選擇電路元件\模型 ,設定元件\模型屬性,設定solution options與analysis setup,run analysis,plot report。 但Simplorer需要注意設定相關item的output屬性active,report結果時才看的到

Designer按[F10],Simplorer按[F12]為Run Analysis

  1. 問題與討論

    2.1 某些電路符號會有一個紅點(red dot)表示方向(如RLC、voltage source),其代表的意義是?  
         為何有些電路符號沒有紅點(如Diode, BJT)?

    Ans:紅點表示電流流入的方向,用來定義該元件電壓的正極端。某些元件符號沒有紅點是因為該元件符號本身就可分辨電流方向

    2.2 Voltage Source的設定裡有一項EMF value是什麼? 

    Ans:不確定EMF是什麼的縮寫(Equation Method Function??),但其主要是用來產生以方程式表示的電壓源

    2.3 Voltage Source的設定裡有一項Spice compatible是什麼? 

    Ans:這項核選(打勾)時,電壓輸出在元件符號"+"端為正,這項沒核選(打勾)時,電壓輸出在元件符號"紅點"端為正

2.4 Voltage Source的[Output/Display] tab設定裡,有一項SDB是什麼? 

Ans:

不確定SDB是什麼的縮寫,但這裡的設定與[Simplorer Circuit]\ [Output Dialog]是同樣效果

2.5 Transient Analysis Setup內的Hmin、Hmax該如何設定較好? 

Ans:

2.6 ICA與EQU有何差別? 

Ans:ICA指定變數的initial value,只在模擬一開始時計算一次

          EQU可以指定隨時間變化的方程式給一個變數,數值的計算在模擬的每個time step都有計算

2.7 p.76為何N_REF的"Block Output Signal"要un-check? 

Ans:只是不需要輸出此signal value,把它output屬性de-active罷了,如果check此項,在"Output Dialog"內就可以看到相對的item有被active

2.8為何Ch6的"Integration method"要改設成"Adaptive Trapezoid-Euler"? 

Ans:如果與Ch5一樣使用"Euler",模擬的結果一樣跑得出來,但會有一個Warning 10907 - A complete convergence within the maximum number of iterations allowed of <30> could not be achieved for all time steps.

2.9 Diode的Component Dialog中,選"Equivalent Line"或"Exponential Function"有何差別? 

AnsEquivalent Line and Exponential Function are both "Mathematical Description" and belong to "basic elements library", but Equivalent Line is more easy for system level usage.

2.10 Simplorer SML (Simplorer Modeling Language) models與VHDL-AMS (VHDL Analog and Mixed Signal Extension Standard, IEEE 1076.1) models有何差別? 

AnsVHDL-AMS block and circuit models are simulated by the analog solver; while SML block elements are solved by a separate block diagram simulator. VHDL-AMS models can be used in parallel with SML models.